News / Press Releases

Ultra Low Latency Networking with FPGAs

On 18 Nov, 2020 By John Lockwood

With reference designs for trading on the Intel PAC D5005, learn how to trade with sub-microsecond latency using Field Programmable Gate Arrays with algorithms in logic. Algo-Logic's Gateware Defined Networking cores provide an Ultra-Low-Latency (ULL) MAC and TCP/IP networking stack on a Stratix 10 FPGA. Reference designs can be used to perform Pre-Trade Risk Checks (PTRCs) and Tick-to-Trade (T2T) with sub-microsecond latency.

Presented at the Intel FPGA Technology Day (IFTD) on Nov 18, 2020

FPGA Tick-to-Trade at Trading Show 2020

On 17 Sep, 2020 By John Lockwood

Update on Algo-Logic's Field Programmable Gate Array trading products as presented at the Trading Show by John Lockwood on Sept 17, 2020.

Includes overview of the the CME Tick-to-Trade system on the V5P, Pre-Trade Risk Checks on the new PAC D5005, HLS triggers, and support for the new iLink 3 on CME.

Algo-Logic at Hot Interconnects 2020

On 16 Aug, 2020 By John Lockwood

At the IEEE Hot Interconnects 2020 conference, Algo-Logic presents a quick update on their new reference design with Algo-Logic's Ultra Low Latency (ULL) MAC and TCP/IP endpoint running on the Intel PAC D5005 card in a HPE DL380 G10 server as well as provide an overview of the Key Value Store (KVS) running an Xilinx ALVEO U50 card in a Dell PowerEdge 1U server.

Half-Billion IOPs of object store in a 1U Dell Server running REDIS

On 12 May, 2020 By gianna

Algo-Logic Systems, Xilinx, Dell, and CCIntegration team up to deliver 490M IOPs with Key Value Store in a 1U Dell Server

SAN JOSE, California., May 12, 2020 (RedisConf 2020) - Algo-Logic Systems, Inc., a recognized leader of Gateware Defined Networking (GDN) accelerated applications, products, and solutions has teamed with Dell, Xilinx, and CCIntegration to demonstrate the capability to deliver a Half-Billion IOPs in a 1U server at the RedisConf 2020 today.

Algo-Logic's Real-time Energy Management System in FPGA Logic

On 13 Jan, 2020 By gianna

Algo-Logic demonstrates a solution for managing real-time electrical energy flows in a power grid using a Key Value Store (KVS) implemented entirely in logic on an ALVEO card, an FPGA-accelerated data acquisition system, an analytics framework for solving energy equations, and dashboards for visualizing energy in a connected city. The system highlights the use of Algo-Logic's IP cores and describes other system-level solutions that Algo-Logic provides for trading futures and ensuring compliance with ultra-low latency and deterministic jitter.

Low-Latency Key-Value Store on Intel Blog

On 26 Nov, 2019 By gianna

Algo-Logic was featured in an article on Intel's website tiled "Low-latency key-value store resides in FPGA SRAM, delivers data in a deterministic 500nsec"

Algo-Logic Systems Delivers Ultra-Low-Latency Pre-Trade Risk Check (PTRC) Solution Powered by Xilinx

On 07 May, 2019 By dina

Algo-Logic Systems Inc., delivers an industry leading Pre-Trade Risk Check (PTRC) solution to verify Security and Exchange Commission Rule 15c3-5 compliance. The Algo-Logic PTRC accelerated system delivers compliance with sub-microsecond latency that is consistently lower than software-based systems.

Exablaze and Algo-Logic partner to deliver ultra-low latency trading solutions

On 16 Apr, 2019 By dina

Exablaze, has today announced its partnership with Algo-Logic Systems Inc., the recognised leader in Gateware Defined Networking® (GDN). Both firms service financial institution clients in trading and HFT, which include investment banks and exchanges trading multiple asset classes. The two firms share expertise in delivering advanced, ultra-low latency, deterministic solutions to financial markets and clients will quickly benefit from this partnership, with Exablaze hardware devices running Algo-Logic’s Gateware.

Algo-Logic is in "Top 10 of Algo Trading Solution Providers-2019"

On 01 Mar, 2019 By dina

Algo-Logic Systems is in "Top 10 of Algo Trading Solution Providers"

Algo-Logic Systems: "Time is money"

On 26 Feb, 2019 By dina

The timescales for automated trading have changed. Decades ago, human market makers that traded in a few seconds were effective. But, over the years automated trading systems were forced to migrate to FPGA based systems delivering sub-microsecond latency just to remain competitive. John Lockwood discusses how Algo-Logic designs and delivers the FPGA-accelerated systems trading firms need to remain competitive.

Ultra Low Latency Networking with FPGAs

FPGA Tick-to-Trade at Trading Show 2020

Algo-Logic at Hot Interconnects 2020

Half-Billion IOPs of object store in a 1U Dell Server running REDIS

Algo-Logic's Real-time Energy Management System in FPGA Logic

Low-Latency Key-Value Store on Intel Blog

Algo-Logic Systems Delivers Ultra-Low-Latency Pre-Trade Risk Check (PTRC) Solution Powered by Xilinx

Exablaze and Algo-Logic partner to deliver ultra-low latency trading solutions

Algo-Logic is in "Top 10 of Algo Trading Solution Providers-2019"

Algo-Logic Systems: "Time is money"

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